SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 1 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 ef series power mosfet with fast body diode features ? fast body diode mosfet using e series technology ? reduced t rr , q rr , and i rrm ? low figure-of- merit (fom): r on x q g ? low input capacitance (c iss ) ? low switching losse s due to reduced q rr ? ultra low gate charge (q g ) ? avalanche energy rated (uis) ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ? telecommunications - server and telecom power supplies ? lighting - high intensity discharge (hid) - light emitting diodes (leds) ? consumer and computing - atx power supplies ? industrial - welding - battery chargers ? renewable energy - solar (pv inverters) ? switch mode power suppliers (smps) ? applications using th e following topologies - llc - phase shifted bridge (zvs) - 3-level inverter - ac/dc bridge notes a. repetitive rating; puls e width limited by maximu m junction temperature. b. v dd = 50 v, starting t j = 25 c, l = 28.2 mh, r g = 25 , i as = 7 a. c. 1.6 mm from case. d. i sd i d , di/dt = 100 a/s, starting t j = 25 c. product summary v ds (v) at t j max. 650 r ds(on) max. at 25 c ( )v gs = 10 v 0.123 q g (max.) (nc) 120 q gs (nc) 17 q gd (nc) 33 configuration single n-channel mosfet g d s to-247ac g d s ordering information package to-247ac lead (pb)-free and halogen-free SIHG28N60EF-ge3 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 600 v gate-source voltage v gs 30 continuous drain current (t j = 150 c) v gs at 10 v t c = 25 c i d 28 a t c = 100 c 18 pulsed drain current a i dm 75 linear derating factor 2w/c single pulse avalanche energy b e as 691 mj maximum power dissipation p d 250 w operating junction and storage temperature range t j , t stg -55 to +150 c drain-source voltage slope t j = 125 c dv/dt 70 v/ns reverse diode dv/dt d 13 soldering recommendations (peak temperature) c for 10 s 300 c
SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 2 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. c oss(er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 % to 80 % v ds . b. c oss(tr) is a fixed capacitance that gives the charging time as c oss while v ds is rising from 0 % to 80 % v ds . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w maximum junction-to-case (drain) r thjc -0.5 specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 600 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.76 - v/c gate-source threshold voltage (n) v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na v gs = 30 v - - 1 a zero gate voltage drain current i dss v ds = 480 v, v gs = 0 v - - 1 a v ds = 480 v, v gs = 0 v, t j = 125 c - - 2 ma drain-source on-sta te resistance r ds(on) v gs = 10 v i d = 14 a - 0.107 0.123 forward transconductance g fs v ds = 30 v, i d = 14 a - 9.7 - s dynamic input capacitance c iss v gs = 0 v, v ds = 100 v, f = 1 mhz - 2714 - pf output capacitance c oss - 123 - reverse transfer capacitance c rss -6- effective output capacitance, energy related a c o(er) v gs = 0 v, v ds = 0 v to 480 v -98- effective output capacitance, time related b c o(tr) - 356 - total gate charge q g v gs = 10 v i d = 14 a, v ds = 480 v -80120 nc gate-source charge q gs -17- gate-drain charge q gd -33- turn-on delay time t d(on) v dd = 480 v, i d = 14 a r g = 9.1 , v gs = 10 v -2448 ns rise time t r -4080 turn-off delay time t d(off) -82123 fall time t f -3978 gate input resistance r g f = 1 mhz, open drain - 0.5 - drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --28 a pulsed diode forward current i sm --70 diode forward voltage v sd t j = 25 c, i s = 11 a, v gs = 0 v - 0.9 1.2 v reverse recovery time t rr t j = 25 c, i f = i s = 14 a, di/dt = 100 a/s, v r = 25 v - 142 284 ns reverse recovery charge q rr - 0.97 1.94 c reverse recovery current i rrm - 13.2 - a s d g
SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 3 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on -resistance vs. temperature fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - c oss and e oss vs. v ds 0 20 40 60 80 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 25 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 15 30 45 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 150 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 20 40 60 80 0 5 10 15 20 25 i d , drain-to- s ource current (a) v gs , g ate-to- s ource voltage (v) t j = 150 c t j = 25 c v d s = 28 v 0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 r d s (on) , drain-to- s ource on-re s i s tance (normalized) t j , junction temperature ( c) i d = 14 a v gs = 10 v 1 10 100 1000 10 000 0 100 200 300 400 500 600 c, capacitance (pf) v d s , drain-to- s ource voltage (v) c i ss c o ss c r ss v gs = 0 v, f = 1 mhz c i ss = c g s + c gd , c d s s horted c r ss = c gd c o ss = c d s + c gd 0 2 4 6 8 10 12 14 16 18 50 500 5000 0 100 200 300 400 500 600 e o ss (j) c o ss (pf) v d s c o ss e o ss
SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 4 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - typical gate charge vs. gate-to-source voltage fig. 8 - typical source-drain diode forward voltage fig. 9 - maximum safe operating area fig. 10 - maximum drain cu rrent vs. case temperature fig. 11 - typical drain-to-source voltage vs. temperature 0 4 8 12 16 20 24 0 40 80 120 160 v gs , g ate-to- s ource voltage (v) q g , total g ate charge (nc) v d s = 480 v v d s = 300 v v d s = 120 v 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 i s d , rever s e drain current (a) v s d , s ource-drain voltage (v) t j = 150 c t j = 25 c v gs = 0 v 0.01 0.1 1 10 100 1101001000 i d , drain current (a) v d s , drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecified limited by r d s (on) * 1 m s i dm limited t c = 25 c t j = 150 c s ingle pul s e bvd ss limited 10 m s 100 s operation in thi s area limited by r d s (on) 0 6 12 18 24 30 25 50 75 100 125 150 i d , drain current (a) t c , ca s e temperature ( c) 575 600 625 650 675 700 725 750 -60 -40 -20 0 20 40 60 80 100 120 140 160 v d s , drain-to- s ource breakdown voltage (v) t j , junction temperature ( c) i d = 250 a
SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 5 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 12 - normalized thermal transient impedance, junction-to-case fig. 13 - switching time test circuit fig. 14 - switching time waveforms fig. 15 - unclamped inductive test circuit fig. 16 - unclamped inductive waveforms fig. 17 - basic ga te charge waveform fig. 18 - gate charge test circuit 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 normalized effective tran s ient thermal impedance pul s e time ( s ) duty cycle = 0.5 0.2 0.1 0.05 0.02 s ingle pul s e pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f r g i as 0.01 t p d.u.t l v ds + - v dd 10 v var y t p to obtain required i as i as v ds v dd v ds t p q gs q gd q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
SIHG28N60EF www.vishay.com vishay siliconix s15-0277-rev. b, 23-feb-15 6 document number: 91602 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 19 - for n-channel vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91602 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
package information www.vishay.com vishay siliconix revision: 01-jul-13 1 document number: 91360 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 to-247ac (high voltage) notes 1. dimensioning and tolera ncing per asme y14.5m-1994. 2. contour of slot optional. 3. dimension d and e do not include mold fl ash. mold flash shall not ex ceed 0.127 mm (0.005") per side . these dimens ions are mea sured at the outermost extremes of the plastic body. 4. thermal pad contour optional with dimensions d1 and e1. 5. lead finish un controlled in l1. 6. ? p to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154"). 7. outline conforms to jedec outline to-247 with exceptio n of dimension c. 8. xian and mingxin actually photo. millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.58 5.31 0.180 0.209 d2 0.51 1.30 0.020 0.051 a1 2.21 2.59 0.087 0.102 e 15.29 15.87 0.602 0.625 a2 1.17 2.49 0.046 0.098 e1 13.72 - 0.540 - b 0.99 1.40 0.039 0.055 e 5.46 bsc 0.215 bsc b1 0.99 1.35 0.039 0.053 ? k 0.254 0.010 b2 1.53 2.39 0.060 0.094 l 14.20 16.25 0.559 0.640 b3 1.65 2.37 0.065 0.093 l1 3.71 4.29 0.146 0.169 b4 2.42 3.43 0.095 0.135 n 7.62 bsc 0.300 bsc b5 2.59 3.38 0.102 0.133 ? p 3.51 3.66 0.138 0.144 c 0.38 0.86 0.015 0.034 ? p1 - 7.39 - 0.291 c1 0.38 0.76 0.015 0.030 q 5.31 5.69 0.209 0.224 d 19.71 20.82 0.776 0.820 r 4.52 5.49 0.178 0.216 d1 13.08 - 0.515 - s 5.51 bsc 0.217 bsc ecn: x13-0103-rev. d, 01-jul-13 dwg: 5971 0.10 a c m m e e/2 (2) (4) r/2 b 2 x r s d see view b 2 x e b4 3 x b 2 x b2 l c l1 1 2 3 q d a a2 a a a1 c ? k b d m m a ?p (datum b) ?p1 d1 4 e1 0.01 b d m m view a - a thermal pad d2 dde e c c view b (b1, b3, b5) base metal c1 (b, b2, b4) section c - c, d - d, e - e (c) planting 4 3 5 7 4 4 4 lead assignments 1. gate 2. drain 3. source 4. drain
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.
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